More than ever, programmable logic ICs are being used as end components within electronic based products or as prototypes for ASIC design. With increasing device complexity and density, schematic-only design is no longer practical. SynarioÆs Programmable IC Design Solution eases your transition to topdown design by offering mixed design entry with schematics, HDLs and state diagrams, and best-in- class HDL-based synthesis and simulation, and interfaces to vendor-specific place-and-route tools. We offer you a front-to-back design solution that seamlessly integrates all the tools you need under one friendly environment - a solution thatÆs universal and ready- to-use.

Defining a programmable IC project in Synario is easy. YouÆll start by gathering any existing source files that you may want to reuse or modify as a part of your design project such as: schematics, HDL code, graphical state diagrams, simulation files, and related documentation. All of these files become a part of your Project Notebook, similar to an engineering notebook, which enables SynarioÆs Project Navigator to keep track of your entire design. The Project Navigator is an intelligent design manager, supervising file manipulation and controlling the design process flow. Project Navigator also recognizes multiple projects as part of a top-level design, allowing automated tracking and configuration management.

To enter your design, Synario supports any combination, VHDL, Verilog, ABEL, graphical state machine, or schematic entry methods. (You can specify device-independent or vendor-specific libraries from the start.) As each design module is defined, you can verify its functionality with your choice of an OVI compliant Verilog simulator, or a VHDL simulator that meets IEEE 1076- 1993/1164 standards. As you modify your design, SynarioÆs Project Navigator recompiles and configures only the changes to your design files, saving time. Once satisfied with your designÆs functionality, youÆre ready to target a specific device.

After selecting a device, SynarioÆs Project Navigator expertly guides you through the design process by presenting a customized list of design steps for the particular architecture youÆve chosen. Processing options can consist of constraint driven RTL synthesis, and advanced optimization with automated resource sharing and I/O mapping, to prepare your design for place- and-route. Our VHDL and Verilog synthesis tools understand the characteristics of your chosen device to ensure high quality results.

Synario supports devices from all the major silicon suppliers. Each vendor kit includes design flows, schematic symbols, simulation models, vendor-specific synthesis technology, and integrated links to the semiconductorÆs place-and-route software. With SynarioÆs kits, you truly have vendor independence - and if you entered your design using HDLs or our device-independent schematic library, retargetting your design to a new architecture is as simple as a click of a button.

From within SynarioÆs Project Navigator environment, launch the vendorÆs place-and-route software, and youÆre on your way to final design implementation. Synario Kits support back annotation of timing information supplied by the vendorÆs place-and-route tools. Our high- performance HDL simulators can then verify the timing of your design implementation, ensuring you get accurate results. When your design is complete, SynarioÆs multi-chip simulation capabilities allow you to verify the functionality or timing between two or more devices in your top-level design.

Interfaces to PCB Layout

To incorporate your programmable ICs you design on to a board, automatic symbol and model generation capabilities make it easy. Synario offers PCB interfaces to support popular PCB layout tools as well as EDIF and SPICE netlist for board design.

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